The present invention relates to the field of semiconductor devices and methods of fabricating semiconductor devices. More specifically, in one embodiment the invention provides semiconductor devices which include pnp, npn, and MOS devices on a single substrate, along with a method of fabrication thereof. According to some embodiments, pnp transistors are fabricated along with npn and field effect transistors without the need for additional masking or process steps.
Bipolar and metal oxide semiconductor (MOS) transistors and their methods of fabrication are well known to those of skill in the art. Often it is desirable to fabricate both MOS and bipolar devices on a single substrate to beneficially incorporate both types of transistors into a single circuit. Combined bipolar and CMOS devices are referred to herein as "BiCMOS" devices. An exemplary BiCMOS device and a method of fabricating BiCMOS devices is disclosed in Vora, U.S. Pat. No. 4,764,480, assigned to the assignee of the present invention and incorporated herein by reference for all purposes. Improved BiCMOS devices and methods of fabrication are disclosed in, for example, U.S. patent application Ser. No. 07/502,943, now abandoned, which is also incorporated herein by reference for all purposes.
Often it is desirable to incorporate both npn and pnp transistors into a single circuit. In some cases it is also desirable to incorporate pnp transistors into BiCMOS circuits. Incorporation of pnp transistors into standard processes often presents substantial difficulties, however. For example, the incorporation of pnp transistors into the fabrication processes often requires additional masking or other fabrication steps in the fabrication process. Some processes result in devices which have undesirable or significantly compromised performance characteristics.
From the above it is seen that an improved device and method of fabrication of pnp transistors in conjunction with npn and/or MOS transistors is desired.